Expansion Header

As standard 40-pin expansion header (J4) is provided to access and monitor the signals from the Sedona module, as shown in Figure 24, with pin-outs listed in Table 13.

Figure 24. 40-pin expansion header J4 on Sedona Dev Board


40-pin expansion header J4 on Sedona Dev Board

Table 13. Expansion header pin-outs with related functions

Pin Signal[a] Primary Function Secondary Function Board Function
1 DIO 0 SPI Slave Select1 (output) Digital I/O LED D1
2 DIO 1 SPI Slave Select2 (output) Digital I/O LED D2
3 DIO 2 SPI Slave Select3 (output) Digital I/O LED D3
4 DIO 3 SPI Slave Select4 (output) Digital I/O LED D4
5 DIO 4 (M) Uart0 Clear to Send (input) Digital I/O RS-232 CTS
6 DIO 5 (M) Uart0 Request to Send (input) Digital I/O RS-232 RTS
7 DIO 6 (M) Uart0 Transmit Data (output) Digital I/O RS-232 TxD
8 DIO 7 (M) Uart0 Receive Data (output) Digital I/O RS-232 RxD
9 DIO 8 Timer0 clock/gate (input) Digital I/O Switch S1[b]
10 DIO 9 Timer0 capture (input) Digital I/O Switch S2 b
11 DIO 10 Timer0 PWM (output) Digital I/O Relay 1
12 DIO 11 Timer1 clock/gate (input) Digital I/O Relay 2
13 DIO 12 Timer1 capture (input) Digital I/O Relay 3
14 DIO 13 Timer1 PWM (output) Digital I/O Relay 4
15 DIO 14 SIF_CLK/IP_CLK Digital I/O I2C CLK
16 DIO 15 SIF_DATA/IP_DI Digital I/O I2C DATA
17 DIO 16 IP_DO Digital I/O RTC_OUT
18 DIO 17 (M) Uart1 Clear To Send Digital I/O RS-485 REN
19 DIO 18 (M) Uart1 Request to Send (output) Digital I/O RS-485 TE
20 DIO 19 (M) Uart1 Transmit Data (output) Digital I/O RS-485 Tx
21 DIO 20 (M) Uart1 Receive Data (output) Digital I/O RS-485 Rx
22 SCLK SPI master clock out/slave clock in
23 MISO SPI Master In/Slave Out
24 MOSI SPI Master Out/Slave In
25 SSZ SPI select from ZED module These two pins are normally shorted on the board by R16.[c]
26 SSM SPI slect to FLASH
27 RESETN Active low reset Usable as output or input.[d]
28 NC No Connection
29 NC
30 CP [+] Comparator inputs (analog range GND to 1.8V)
31 CM [-]
32 DAC1 Digital to Analog 1 output (Range GND to Vdd+0.3)
33 DAC2 Digital to Analog 2 output (Range GND to Vdd+0.3)
34 ADC1 (M) Analog to Digital 1 input (Range GND to Vdd+0.3)
35 ADC2 (M) Analog to Digital 2 input (Range GND to Vdd+0.3)
36 ADC3 (M) Analog to Digital 3 input (Range GND to Vdd+0.3)
37 ADC4 (M) Analog to Digital 4 input (Range GND to Vdd+0.3)
38 GND Ground
39 VCC 3.3 Volts
40 GND Ground

[a] DIO n (M) is for monitoring signal only, where the DIO should not be driven.

[b] Switches are pulled up to VCC by 2.2K ohm resistors.

[c] Pins 25 and 26 are normally shorted on the board by R16 to enable the JN5139 bootstrap program to access the module flash memory.

[d] Pin 27 (RESETN), if used as an output, goes low when reset switch SW5 is pressed. This may be used to simultaneously reset external devices with the board. Alternatively, as an input, this can be shorted to ground to allow external devices to force a system reset.